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A model for ITIS project portfolio selection in the presence of uncertainty Combination of fuzzy multi-criteria decision making and fuzzy mathematical programming ...
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A model for ITIS project portfolio selection in the presence of uncertainty Combination of fuzzy multi-criteria decision making and fuzzy mathematical programming ...
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Programmable volatile/non-volatile memory cell
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In: https://hal-lirmm.ccsd.cnrs.fr/lirmm-01688122 ; United States, Patent n° : US20140050012 A1. 2014 (2014)
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Compact volatile/non-volatile memory cell
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In: https://hal-lirmm.ccsd.cnrs.fr/lirmm-01688147 ; United States, Patent n° : US20140043062 A1. 2014 (2014)
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Automated generation of efficient instruction decoders for instruction set simulators
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In: Conference on Computer Aided Design (ICCAD'13) ; https://hal.archives-ouvertes.fr/hal-01059142 ; Conference on Computer Aided Design (ICCAD'13), Nov 2013, San Jose, CA, United States. pp.739-746, ⟨10.1109/ICCAD.2013.6691197⟩ (2013)
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TOETS: Work Package 1
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In: The European Nanoelectronics Forum 2011 ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-00653039 ; The European Nanoelectronics Forum 2011, Nov 2011, Dublin, Ireland. 2011 ; http://www.catrene.org/web/forum2011/ (2011)
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Wireless Wafer Test for Iterative Testing During System Assembly
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In: 3D-Test: Testing Three-Dimensional Stacked Integrated Circuits ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-00537849 ; 3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Nov 2010, Austin, Texas, United States. 1st IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, 2010 ; http://www.ieee-tttc.org/ebshistory/2010/2010-06-14%203D-Test10%20CfP.html (2010)
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Wireless Approach for SIP and SOC Testing ; Méthode de test sans fil en vue des SIP et des SOC
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In: https://tel.archives-ouvertes.fr/tel-00512832 ; Micro and nanotechnologies/Microelectronics. Université Montpellier II - Sciences et Techniques du Languedoc, 2010. English (2010)
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System and Method for Wirelessly Testing Integrated Circuits
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In: https://hal-lirmm.ccsd.cnrs.fr/lirmm-00767777 ; Spain, Patent n° : EP 08290891 WO 2010031879 (A1). 2008, pp.N/A (2008)
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Wireless Test Structure for Integrated Systems
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In: ITC'2008: International Test Conference ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-00375077 ; ITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. pp.N/A, 2008, ⟨10.1109/TEST.2008.4700704⟩ (2008)
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Power Supply Investigation for Wireless Wafer Test
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In: LATW'08: 9th Latin-American Test Workshop ; https://hal-lirmm.ccsd.cnrs.fr/lirmm-00260205 ; LATW'08: 9th Latin-American Test Workshop, Mar 2008, Puebla, Mexico. pp.165-170 (2008)
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IBIS and ICEM
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In: Proceedings of the 3rd International Workshop on Electromagnetic Compatibility of Integrated Circuits ; 3rd International Workshop on Electromagnetic Compatibility of Integrated Circuits ; https://hal.archives-ouvertes.fr/hal-00517645 ; 3rd International Workshop on Electromagnetic Compatibility of Integrated Circuits, Nov 2002, Toulouse, France. pp 10-12 (2002)
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Tasks, Domains, and Languages for Information Extraction
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In: DTIC (1993)
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Highly wireable multilevel synthesis with compiled cells
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In: Logic-and-Architecture-Synthesis-for-Silicon-Compilers.-Proceedings-of-the-International-Workshop ; https://hal.archives-ouvertes.fr/hal-00015340 ; Logic-and-Architecture-Synthesis-for-Silicon-Compilers.-Proceedings-of-the-International-Workshop, 1989, Grenoble, France. pp.37-52 (1989)
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A channelless layout for multilevel synthesis with compiled cells
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In: Proceedings.-1989-IEEE-International-Conference-on-Computer-Design:-VLSI-in-Computers-and-Processors-Cat.-No.89CH2794-6 ; https://hal.archives-ouvertes.fr/hal-00015347 ; Proceedings.-1989-IEEE-International-Conference-on-Computer-Design:-VLSI-in-Computers-and-Processors-Cat.-No.89CH2794-6, 1989, Cambridge, MA, United States. pp.35-8, ⟨10.1109/ICCD.1989.63323⟩ (1989)
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Japanese Scientific and Technical Information Session -- Special Libraries Association Annual Conference (78th) Held in Anaheim, California on 10 June 1987: Selected Papers
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In: DTIC AND NTIS (1988)
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